Index of /~vruiz/docencia/laboratorio_arquitectura/proyectos/00-01/JuaniInma

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[PARENTDIR]Parent Directory  -  
[TXT]clock.c2013-01-29 18:07 529  
[TXT]clock.h2013-01-29 18:07 392  
[   ]clock.o2013-01-29 18:07 3.6K 
[TXT]counters.c2013-01-29 18:07 2.2K 
[TXT]counters.h2013-01-29 18:07 6.6K 
[   ]counters.o2013-01-29 18:07 20K 
[TXT]gates-delay.c2013-01-29 18:07 3.8K 
[TXT]gates-delay.h2013-01-29 18:07 1.4K 
[   ]test_adder_bit_cla2013-01-29 18:07 88K 
[   ]test_and3b2013-01-29 18:07 35K 
[   ]test_clock2013-01-29 18:07 20K 
[   ]test_decod2013-01-29 18:07 46K 
[   ]Makefile2013-01-29 18:07 13K 
[   ]README2013-01-29 18:07 241  
[TXT]gates-simplest.h2013-01-29 18:07 1.5K 
[TXT]mem.c2013-01-29 18:07 8.5K 
[TXT]memorias.c2013-01-29 18:07 8.5K 
[TXT]monostable.c2013-01-29 18:07 379  
[TXT]monostable.h2013-01-29 18:07 328  
[   ]monostable.o2013-01-29 18:07 3.5K 
[TXT]pruebacon.c2013-01-29 18:07 1.2K 
[TXT]r2000.h2013-01-29 18:07 7.8K 
[TXT]signo_extendido16.c2013-01-29 18:07 540  
[TXT]signo_extendido16.h2013-01-29 18:07 82  
[   ]signo_extendido16.o2013-01-29 18:07 8.9K 
[TXT]simulacion.c2013-01-29 18:07 3.4K 
[   ]sources.tar.gz2013-01-29 18:07 46K 
[   ]test_alu_bit_cla2013-01-29 18:07 89K 
[   ]test_alu_msbit2013-01-29 18:07 89K 
[   ]test_and2013-01-29 18:07 35K 
[   ]test_au_4bin_counter2013-01-29 18:07 55K 
[   ]test_au_bcd_counter_clr2013-01-29 18:07 55K 
[TXT]test_counters.c2013-01-29 18:07 3.8K 
[   ]test_decod_2_42013-01-29 18:07 40K 
[   ]test_demux2013-01-29 18:07 55K 
[TXT]test_gates.c2013-01-29 18:07 5.9K 
[   ]test_mux2013-01-29 18:07 55K 
[   ]test_nand32013-01-29 18:07 35K 
[   ]test_neg_d_ff_pc2013-01-29 18:07 48K 
[   ]test_neg_jk_ff2013-01-29 18:07 48K 
[   ]test_neg_sr_ff2013-01-29 18:07 48K 
[   ]test_nxor32013-01-29 18:07 35K 
[   ]test_positive_detector2013-01-29 18:07 48K 
[   ]test_positive_glich_supressor2013-01-29 18:07 56K 
[   ]test_reg_82013-01-29 18:07 53K 
[TXT]test_srams.c2013-01-29 18:07 4.0K 
[   ]test_su_8bin_counter2013-01-29 18:07 55K 
[TXT]ucs.c2013-01-29 18:07 8.5K 
[TXT]ucs.h2013-01-29 18:07 21K 
[TXT]control.c2013-01-29 18:07 896  
[TXT]control.h2013-01-29 18:07 268  
[   ]control.o2013-01-29 18:07 12K 
[TXT]control_alu.c2013-01-29 18:07 497  
[TXT]control_alu.h2013-01-29 18:07 282  
[   ]control_alu.o2013-01-29 18:07 16K 
[TXT]decods.c2013-01-29 18:07 2.3K 
[TXT]decods.h2013-01-29 18:07 3.1K 
[   ]decods.o2013-01-29 18:07 11K 
[TXT]defs.h2013-01-29 18:07 237  
[TXT]ejcs.c2013-01-29 18:07 588  
[TXT]flip-flops.c2013-01-29 18:07 1.6K 
[TXT]flip-flops.h2013-01-29 18:07 7.2K 
[   ]flip-flops.o2013-01-29 18:07 16K 
[TXT]fr32x32.c2013-01-29 18:07 1.3K 
[TXT]fr32x32.h2013-01-29 18:07 5.4K 
[TXT]gates.c2013-01-29 18:07 6.4K 
[TXT]gates.h2013-01-29 18:07 1.8K 
[   ]gates.o2013-01-29 18:07 15K 
[TXT]random.c2013-01-29 18:07 521  
[TXT]random.h2013-01-29 18:07 349  
[   ]random.o2013-01-29 18:07 11K 
[TXT]registros.c2013-01-29 18:07 4.5K 
[TXT]sdlc++.h2013-01-29 18:07 360  
[TXT]srams.c2013-01-29 18:07 1.3K 
[TXT]srams.h2013-01-29 18:07 12K 
[   ]srams.o2013-01-29 18:07 16K 
[   ]test_alu_32bit_cla2013-01-29 18:07 102K 
[   ]test_au_bcd_counter2013-01-29 18:07 55K 
[   ]test_decod_2_4_sel2013-01-29 18:07 41K 
[TXT]test_decods.c2013-01-29 18:07 3.1K 
[TXT]test_fr32x32.c2013-01-29 18:07 6.1K 
[   ]test_fr_32x322013-01-29 18:07 68K 
[   ]test_fr_bit2013-01-29 18:07 62K 
[   ]test_monostable2013-01-29 18:07 20K 
[   ]test_mux_2_12013-01-29 18:07 50K 
[   ]test_mux_4_12013-01-29 18:07 50K 
[   ]test_neg_d_ff2013-01-29 18:07 48K 
[   ]test_nor2013-01-29 18:07 35K 
[   ]test_not2013-01-29 18:07 35K 
[   ]test_or2013-01-29 18:07 35K 
[   ]test_or32013-01-29 18:07 35K 
[TXT]test_random.c2013-01-29 18:07 360  
[   ]test_sr_ff_ms2013-01-29 18:07 48K 
[   ]test_sram_16x42013-01-29 18:07 67K 
[   ]test_sram_bit2013-01-29 18:07 57K 
[   ]test_xor2013-01-29 18:07 35K 
[TXT]alu32.c2013-01-29 18:07 32K 
[TXT]alu32.h2013-01-29 18:07 11K 
[   ]alu32.o2013-01-29 18:07 55K 
[   ]fr32x32.o2013-01-29 18:07 15K 
[   ]memoria.doc2013-01-29 18:07 56K 
[TXT]monociclo.c2013-01-29 18:07 20K 
[TXT]monociclo.h2013-01-29 18:07 2.5K 
[   ]monociclo.o2013-01-29 18:07 66K 
[TXT]muxs.c2013-01-29 18:07 1.9K 
[TXT]muxs.h2013-01-29 18:07 2.6K 
[   ]muxs.o2013-01-29 18:07 16K 
[   ]prog1.asm2013-01-29 18:07 138  
[   ]prog1.r2k2013-01-29 18:07 298  
[TXT]prog2.txt2013-01-29 18:07 1.0K 
[TXT]pruebalu.c2013-01-29 18:07 665  
[TXT]regs.c2013-01-29 18:07 1.2K 
[TXT]regs.h2013-01-29 18:07 2.0K 
[   ]regs.o2013-01-29 18:07 15K 
[   ]simulacion2013-01-29 18:07 177K 
[TXT]test_alu32.c2013-01-29 18:07 11K 
[   ]test_alu_32bit_rc2013-01-29 18:07 102K 
[   ]test_alu_bit2013-01-29 18:07 89K 
[   ]test_au_8bin_counter2013-01-29 18:07 55K 
[   ]test_buffer_z2013-01-29 18:07 35K 
[TXT]test_muxs.c2013-01-29 18:07 3.8K 
[   ]test_nand3b2013-01-29 18:07 35K 
[   ]test_negative_detector2013-01-29 18:07 48K 
[   ]test_negative_glich_supressor2013-01-29 18:07 56K 
[   ]test_random2013-01-29 18:07 27K 
[TXT]test_regs.c2013-01-29 18:07 903  
[   ]test_sr_latch_nor2013-01-29 18:07 39K 
[   ]test_sram_16x4_b2013-01-29 18:07 61K 
[   ]asm2r2k2013-01-29 18:07 44K 
[TXT]asm2r2k.c2013-01-29 18:07 16K 
[TXT]gates-setup-delay.c2013-01-29 18:07 6.4K 
[TXT]gates-setup-delay.h2013-01-29 18:07 1.8K 
[TXT]latches.c2013-01-29 18:07 873  
[TXT]latches.h2013-01-29 18:07 3.1K 
[   ]latches.o2013-01-29 18:07 9.4K 
[TXT]print.c2013-01-29 18:07 451  
[TXT]print.h2013-01-29 18:07 376  
[   ]test_ad_4bin_counter2013-01-29 18:07 55K 
[   ]test_and32013-01-29 18:07 35K 
[TXT]test_clock.c2013-01-29 18:07 484  
[TXT]test_comparador.c2013-01-29 18:07 1.2K 
[   ]test_d_latch2013-01-29 18:07 38K 
[   ]test_decod_5_322013-01-29 18:07 41K 
[   ]test_decod_5_32_sel2013-01-29 18:07 41K 
[   ]test_demux_1_22013-01-29 18:07 50K 
[   ]test_demux_1_42013-01-29 18:07 50K 
[   ]test_jk_ff_ms2013-01-29 18:07 48K 
[   ]test_jk_latch2013-01-29 18:07 39K 
[   ]test_jk_latch_enable2013-01-29 18:07 39K 
[TXT]test_latches.c2013-01-29 18:07 2.5K 
[TXT]test_monostable.c2013-01-29 18:07 422  
[   ]test_nand2013-01-29 18:07 35K 
[   ]test_neg_jk_ff_pc2013-01-29 18:07 48K 
[   ]test_nor32013-01-29 18:07 35K 
[   ]test_nxor2013-01-29 18:07 35K 
[   ]test_paco2013-01-29 18:07 48K 
[   ]test_sr_latch_enable2013-01-29 18:07 39K 
[   ]test_sr_latch_nand2013-01-29 18:07 39K 
[   ]test_su_4bin_counter2013-01-29 18:07 55K 
[   ]test_su_bin_counter2013-01-29 18:07 60K 
[   ]test_xor32013-01-29 18:07 35K 
[   ]test_adder_bit2013-01-29 18:07 88K 
[TXT]test_flip-flops.c2013-01-29 18:07 4.9K